An input protection circuit changes the voltage of a signal to be input to an input circuit to a predetermined voltage or less and outputs the signal. The input protection circuit includes a first NMOS transistor and a second NMOS transistor. The the first NMOS transistor includes a source to which an input signal is input, a gate to which a voltage based on a first voltage is applied, and a drain that outputs the signal to the input circuit based on the input signal and the gate voltage. The second NMOS transistor includes a source and a gate to each of which the voltage based on the first voltage is applied, and a drain that outputs a second voltage to the input circuit.