Invention Grant
- Patent Title: Agile VM load balancing through micro-checkpointing and multi-architecture emulation
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Application No.: US15850958Application Date: 2017-12-21
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Publication No.: US10261823B2Publication Date: 2019-04-16
- Inventor: Bulent Abali , Michael R. Hines , Gokul B. Kandiraju , Jack L. Kouloheris
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Jennifer Davis
- Main IPC: G06F9/455
- IPC: G06F9/455 ; G06F9/50

Abstract:
Methods and systems for agile load balancing include detecting an increased load for a first primary virtual machine (VM) on a first node that has a plurality of additional primary VMs running on a processor; deactivating one or more of the additional primary VMs, reducing said one or more deactivated VMs to a secondary state, to free resources at the first node for the first primary VM; and activating secondary VMs, located at one or more additional nodes, that correspond to the one or more deactivated VMs, raising said secondary VMs to a primary state. Activation and deactivation through micro-checkpointing may involve nodes of different CPU architectures during transient periods of peak load.
Public/Granted literature
- US20180136964A1 AGILE VM LOAD BALANCING THROUGH MICRO-CHECKPOINTING AND MULTI-ARCHITECTURE EMULATION Public/Granted day:2018-05-17
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