Invention Grant
- Patent Title: Decoder architecture for quantum error correction
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Application No.: US15685378Application Date: 2017-08-24
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Publication No.: US10261848B2Publication Date: 2019-04-16
- Inventor: Jonathan Lee , Michele Reilly
- Applicant: Turing Inc.
- Applicant Address: US CA Berkeley
- Assignee: Turing Inc.
- Current Assignee: Turing Inc.
- Current Assignee Address: US CA Berkeley
- Agency: Proskauer Rose LLP
- Main IPC: G06F7/02
- IPC: G06F7/02 ; H03M13/00 ; G06F11/07 ; G06N99/00

Abstract:
A system for locating errors for quantum computing includes an interface, a shift array, a comparison block, a tree pipeline, and a serializer. The interface is configured to receive a set of quantum bit values, wherein the set of quantum bit values comprise a subset of quantum bit values in a quantum bit array. The shift array is configured to store a prior set of quantum bit values read from identical quantum bit locations at a prior time corresponding to the set of quantum bit values. The comparison block is configured to identify differences between the set of quantum bit values and the prior set of quantum bit values. The tree pipeline configured to rank the differences identified. The serializer is configured to serialize the differences identified in order by rank.
Public/Granted literature
- US20190065299A1 DECODER ARCHITECTURE FOR QUANTUM ERROR CORRECTION Public/Granted day:2019-02-28
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