Invention Grant
- Patent Title: Synthesis of DC accurate noise compatible reduced netlist
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Application No.: US14754480Application Date: 2015-06-29
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Publication No.: US10262094B2Publication Date: 2019-04-16
- Inventor: Yiannis Moisiadis , Nikolaos Mouravliansky , Konstantis Daloukas
- Applicant: Helic, Inc.
- Applicant Address: US CA San Jose
- Assignee: Helic, Inc.
- Current Assignee: Helic, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Shami Messinger PLLC
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
In one embodiment, a circuit analysis method includes obtaining a netlist of a circuit, generating a reduced model from the netlist, using the reduced model to synthesize a noise compatible netlist, ensuring accurate DC behavior, and simulating the circuit using the synthesized netlist.
Public/Granted literature
- US20160378889A1 SYNTHESIS OF DC ACCURATE NOISE COMPATIBLE REDUCED NETLIST Public/Granted day:2016-12-29
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