Invention Grant
- Patent Title: Layer-based memory controller optimizations for three dimensional memory constructs
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Application No.: US15589863Application Date: 2017-05-08
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Publication No.: US10262744B2Publication Date: 2019-04-16
- Inventor: Fan Zhang , Yu Cai , Chenrong Xiong , Aman Bhatia , HyungSeok Kim , David Pignatelli
- Applicant: SK Hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Kilpatrick Townsend & Stockton LLP
- Main IPC: G11C16/28
- IPC: G11C16/28 ; G11C16/04 ; G11C16/10 ; G11C5/02 ; G11C7/18 ; G11C16/34 ; G11C29/02
Abstract:
Disclosed are techniques for selecting one or more reference voltages for performing one or more operations on a memory cell based on a determined layer of a three-dimensional memory construct to which the memory cell belongs. The one or more operations can include read or write operations. The memory cell can be a flash memory cell.
Public/Granted literature
- US20180047453A1 LAYER-BASED MEMORY CONTROLLER OPTIMIZATIONS FOR THREE DIMENSIONAL MEMORY CONSTRUCTS Public/Granted day:2018-02-15
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