A level shifter that comprises an input operating in an input voltage domain and an output for outputting an output signal in an output voltage domain. The level shifter further includes an inverter circuit operating in the input voltage domain for inverting an input signal to create an inverted input signal. The level shifter also includes an intermediate circuit operating in an intermediate voltage domain for generating an intermediate signal. An output buffer circuit generates the output signal based at least in part on the inverted input signal and the intermediate signal.