Invention Grant
- Patent Title: Physical layer circuitry for multi-wire interface
-
Application No.: US16039348Application Date: 2018-07-19
-
Publication No.: US10263762B2Publication Date: 2019-04-16
- Inventor: Ching-Hsiang Chang , Yuan-Hsun Chang , Yueh-Chuan Lu , Huai-Te Wang
- Applicant: M31 Technology Corporation
- Applicant Address: TW Hsinchu County
- Assignee: M31 Technology Corporation
- Current Assignee: M31 Technology Corporation
- Current Assignee Address: TW Hsinchu County
- Agent Winston Hsu
- Main IPC: G06F5/00
- IPC: G06F5/00 ; H04L7/00 ; H03K19/21 ; H03K3/037 ; H03K7/08 ; G04F10/00 ; H03F3/45 ; G06F1/06 ; H03K5/14 ; H03M7/00 ; H04M1/38 ; H04B1/40 ; H04B1/58 ; H04B3/00 ; H04B1/00
Abstract:
The present invention provides pad arrangements, termination circuits, clock/data recovery circuits, and deserialization architecture for a physical layer circuitry including a four-signal or six-signal physical medium attachment sublayer (PMA).
Public/Granted literature
- US20180323952A1 PHYSICAL LAYER CIRCUITRY FOR MULTI-WIRE INTERFACE Public/Granted day:2018-11-08
Information query
