- Patent Title: Memory devices having selectively electrically connected data lines
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Application No.: US16021306Application Date: 2018-06-28
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Publication No.: US10269431B2Publication Date: 2019-04-23
- Inventor: Toru Tanzawa
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C11/00 ; G11C16/10 ; G11C16/26 ; G11C16/34 ; G11C16/08 ; G11C16/32

Abstract:
Memory devices may include a first string of memory cells selectively electrically connected to a first data line and a second string of memory cells selectively electrically connected to a second data line, wherein the first data line and the second data line are selectively electrically connected with no intervening memory cells, thereby permitting connecting the first and second data lines in series before programming or sensing memory cells of the first and second strings of memory cells.
Public/Granted literature
- US20180308548A1 MEMORY DEVICES HAVING SELECTIVELY ELECTRICALLY CONNECTED DATA LINES Public/Granted day:2018-10-25
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