Invention Grant
- Patent Title: Memory system
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Application No.: US16160667Application Date: 2018-10-15
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Publication No.: US10269434B2Publication Date: 2019-04-23
- Inventor: Katsuhiko Iwai , Takashi Ogasawara
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2017-178053 20170915
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C16/14 ; G11C16/10 ; G11C11/56 ; H01L27/1157 ; H01L27/11582

Abstract:
According to one embodiment, a memory system includes a semiconductor memory including a memory cell, and a controller configured to control the semiconductor memory and capable of creating second data based on first data read from the memory cell. Upon receiving a physical erase request for the first data held in the memory cell from an external device, the controller transmits one of an erase instruction and a write instruction for the second data to the semiconductor memory.
Public/Granted literature
- US20190088338A1 MEMORY SYSTEM Public/Granted day:2019-03-21
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