Invention Grant
- Patent Title: Method of fabricating DMOS and CMOS transistors
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Application No.: US15831897Application Date: 2017-12-05
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Publication No.: US10269653B2Publication Date: 2019-04-23
- Inventor: Hyun Kwang Shin , Jung Lee , Kyung Ho Lee
- Applicant: Magnachip Semiconductor, Ltd.
- Applicant Address: KR Cheongju-si
- Assignee: MagnaChip Semiconductor, Ltd.
- Current Assignee: MagnaChip Semiconductor, Ltd.
- Current Assignee Address: KR Cheongju-si
- Agency: NSIP Law
- Priority: KR10-2016-0118251 20160913
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L21/8238 ; H01L29/78

Abstract:
A method of fabricating a semiconductor device including a diffused metal-oxide-semiconductor (DMOS) transistor, an n-type metal-oxide-semiconductor (NMOS) transistor, and a p-type metal-oxide-semiconductor (PMOS) transistor includes forming separation regions in a semiconductor substrate, forming a gate insulating film, forming a DMOS gate electrode on the gate insulating film, forming a first mask pattern on the semiconductor substrate, performing a first ion implantation process, forming a second mask pattern on the semiconductor substrate, performing a second ion implantation process, forming a third mask pattern on the semiconductor substrate and performing a third ion implantation process into the semiconductor substrate, and forming a fourth mask pattern on the semiconductor substrate and performing a fourth ion implantation process.
Public/Granted literature
- US20180096897A1 METHOD OF FABRICATING DMOS AND CMOS TRANSISTORS Public/Granted day:2018-04-05
Information query
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