Invention Grant
- Patent Title: System and method for test key characterizing wafer processing state
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Application No.: US15250764Application Date: 2016-08-29
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Publication No.: US10269666B2Publication Date: 2019-04-23
- Inventor: Clement Hsingjen Wann , Ling-Yen Yeh , Chi-Yuan Shih , Wei-Chun Tsai
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L21/28 ; H01L21/76 ; H01L23/544 ; G01R31/28 ; H01L21/762 ; H01L27/088 ; H01L29/06

Abstract:
Disclosed herein is a method for forming a test key system for characterizing wafer processing states, the method comprising forming a plurality of shallow trench isolation structures (STIs) on a substrate of a wafer and in a scribe line of the wafer and forming a test key on the substrate of a wafer and in the scribe line of the wafer. Forming the test key comprises forming at least one test key group having a plurality of test key series, each of the plurality of test key series having a plurality of test pads, each one of the plurality of test key series having a first physical characteristic different from the first physical characteristic of other test key series the at least one first test key group.
Public/Granted literature
- US20160372390A1 System and Method for Test Key Characterizing Wafer Processing State Public/Granted day:2016-12-22
Information query
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