- Patent Title: Semiconductor device packaging with reduced size and delamination
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Application No.: US14893139Application Date: 2014-05-23
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Publication No.: US10269667B2Publication Date: 2019-04-23
- Inventor: Carl Van Buggenhout
- Applicant: MELEXIS TECHNOLOGIES NV
- Applicant Address: BE Tessenderlo
- Assignee: MELEXIS TECHNOLOGIES NV
- Current Assignee: MELEXIS TECHNOLOGIES NV
- Current Assignee Address: BE Tessenderlo
- Agency: Workman Nydegger
- Priority: GB1309349.7 20130523
- International Application: PCT/EP2014/060747 WO 20140523
- International Announcement: WO2014/187996 WO 20141127
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L23/04 ; B81C1/00 ; H01L23/31 ; H01L21/52 ; H01L21/56 ; H01L23/16
Abstract:
A packaged semiconductor device comprising a stack including a die comprising a functional circuit, and a cap which is wafer bonded to the die for protecting the functional circuit as well as a mold component for packaging the stack. At least the cap and/or the die comprises at least one groove at least partially in contact with the mold component, for increasing adhesion of the mold component to the stack. A corresponding method for manufacturing such a packaged device also is described.
Public/Granted literature
- US20160093544A1 Packaging of Semiconductor Devices Public/Granted day:2016-03-31
Information query
IPC分类:
