Invention Grant
- Patent Title: Input output for an integrated circuit
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Application No.: US15702610Application Date: 2017-09-12
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Publication No.: US10269772B2Publication Date: 2019-04-23
- Inventor: Chin-Ming Fu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Main IPC: G06F17/50
- IPC: G06F17/50 ; H01L25/00 ; H01L25/065 ; H01L23/00 ; H01L23/60

Abstract:
A three-dimensional integrated circuit has a plurality of layers disposed in a stacked relationship. Logic circuitry is embodied in a first layer of the three-dimensional integrated circuit. An input output circuit is electrically coupled to the logic circuitry and has a plurality of transistors embodied in at least two layers of the three-dimensional integrated circuit. The input output circuit has first and second input output circuitry, wherein the first input output circuitry operates faster than the second input output circuitry.
Public/Granted literature
- US20180005996A1 INPUT OUTPUT FOR AN INTEGRATED CIRCUIT Public/Granted day:2018-01-04
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