Vertical gate semiconductor device with steep subthreshold slope
Abstract:
A semiconductor device includes a substrate, a well on the substrate and an FFT on the well. The FET includes a first source/drain, a vertical channel layer, a gate structure, a second source/drain and a body structure. The first source/drain is on the well. The vertical channel layer extends form the first source/drain. The first gate structure surrounds a first portion of sidewalls of the vertical channel layer. The second source/drain is on the vertical channel layer. The body structure is in physical contact with the vertical channel layer. The body structure and the vertical channel layer constitute a bipolar device.
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