Invention Grant
- Patent Title: Turbo decoders with stored column indexes for interleaver address generation and out-of-bounds detection and associated methods
-
Application No.: US14555346Application Date: 2014-11-26
-
Publication No.: US10270473B2Publication Date: 2019-04-23
- Inventor: Robert Bahary , Eric J Jackowski
- Applicant: Freescale Semiconductor, Inc.
- Applicant Address: US TX Austin
- Assignee: NXP USA, Inc.
- Current Assignee: NXP USA, Inc.
- Current Assignee Address: US TX Austin
- Agent Sherry W. Schumm
- Main IPC: H03M13/27
- IPC: H03M13/27 ; H03M13/29 ; G06F11/10

Abstract:
A turbo decoder decodes encoded data using a regenerated interleaver sequence. An addressable column index memory stores column indexes of the encoded data during an input phase of a turbo decode operation. An address generator generates the regenerated interleaver sequence based on the column indexes and computed data. In embodiments the address generator can read column indexes from the addressable column index memory, compute the computed data by permuting row indexes in a same row permuting order as an encoder that encoded the encoded data, combine the column indexes so read and the row indexes so permuted, use a row counter, and identify out of bounds addresses using the regenerated interleaver sequence.
Public/Granted literature
Information query
IPC分类: