Invention Grant
- Patent Title: Method and system for hardware accelerated cache flush
-
Application No.: US15654361Application Date: 2017-07-19
-
Publication No.: US10282116B2Publication Date: 2019-05-07
- Inventor: Horia Simionescu , Timothy Hoglund , Sridhar Rao Veerla , Panthini Pandit , Gowrisankar Radhakrishnan
- Applicant: Avago Technologies International Sales Pte. Limited
- Applicant Address: SG Singapore
- Assignee: Avago Technologies International Sales Pte. Limited
- Current Assignee: Avago Technologies International Sales Pte. Limited
- Current Assignee Address: SG Singapore
- Agency: Sheridan Ross P.C.
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F3/06 ; G06F12/128 ; G06F12/0831 ; G06F13/00 ; G06F13/28

Abstract:
A system and method for efficient cache flushing are provided. The disclosed method includes allocating one or more Internal Scatter Gather Lists (ISGLs) for the cache flush, populating the one or more ISGLs with Cache Segment Identifiers (CSIDs) and corresponding Buffer Segment Identifiers (BSIDs) of each strip that is identified as dirty, of a skip-type Internal Scatter Gather Element (ISGE), or of a missing arm-type ISGE. The disclosed method further includes allocating a flush Local Message Identifier (LMID) as a message to be used in connection with processing the cache flush, populating the flush LMID with an identifier of the one or more ISGLs, and transferring the flush LMID to a cache manager module to enable the cache manager module to execute the cache flush based on information contained in the flush LMID.
Public/Granted literature
- US20190026033A1 METHOD AND SYSTEM FOR HARDWARE ACCELERATED CACHE FLUSH Public/Granted day:2019-01-24
Information query