Invention Grant
- Patent Title: Semiconductor device
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Application No.: US15706280Application Date: 2017-09-15
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Publication No.: US10283178B2Publication Date: 2019-05-07
- Inventor: Hiroyuki Takahashi
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2016-189280 20160928
- Main IPC: G11C5/06
- IPC: G11C5/06 ; G11C5/02 ; G11C8/12 ; H01L25/065 ; G11C7/10 ; H01L23/528

Abstract:
A semiconductor device which reduces power consumption. In the semiconductor device, semiconductor chips are stacked over a base chip. The stacked chips include n through-silicon vias as a first group and m through-silicon vias as a second group. In each of the first and second groups, the through-silicon vias are coupled by a shift circular method, in which the 1st to (n−1)th ((m−1)th) through-silicon vias of a lower chip are coupled with the 2nd to n-th (m-th) through-silicon vias of an upper chip respectively and the n-th (m-th) through-silicon via of the lower chip is coupled with the 1st through-silicon via of the upper chip. n and m have only one common divisor. Activation of the stacked semiconductor chips is controlled by combination of a first selection signal transmitted through through-silicon vias of the first group and a second selection signal transmitted through through-silicon vias of the second group.
Public/Granted literature
- US20180090193A1 SEMICONDUCTOR DEVICE Public/Granted day:2018-03-29
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