Invention Grant
- Patent Title: Chip package structure and method for forming the same
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Application No.: US15708456Application Date: 2017-09-19
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Publication No.: US10283474B2Publication Date: 2019-05-07
- Inventor: Shin-Puu Jeng , Shuo-Mao Chen , Feng-Cheng Hsu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/00 ; H01L25/065 ; H01L23/29 ; H01L23/31 ; H01L21/78

Abstract:
A method for forming a chip package structure is provided. The method includes forming a first dielectric layer over a carrier substrate. The first dielectric layer is a continuous dielectric layer and has openings. The method includes forming a first wiring layer over the first dielectric layer and in the openings. The first dielectric layer and the first wiring layer together form a redistribution structure, and the redistribution structure has a first surface and a second surface. The method includes disposing a first chip and a first conductive bump over the first surface. The method includes forming a first molding layer over the first surface. The method includes removing the carrier substrate. The method includes disposing a second chip and a second conductive bump over the second surface. The method includes forming a second molding layer over the second surface.
Public/Granted literature
- US20190006309A1 CHIP PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME Public/Granted day:2019-01-03
Information query
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