Invention Grant
- Patent Title: Integrated circuit filler and method thereof
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Application No.: US15484628Application Date: 2017-04-11
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Publication No.: US10283496B2Publication Date: 2019-05-07
- Inventor: Tseng Chin Lo , Molly Chang , Ya-Wen Tseng , Chih-Ting Sun , Zi-Kuan Li , Bo-Sen Chang , Geng-He Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L27/02 ; G06F17/50 ; H01L21/027 ; H01L21/8234 ; H01L21/66 ; H01L27/11

Abstract:
Provided is a method for inserting a pre-designed filler cell, as a replacement to a standard filler cell, including identifying at least one gap among a plurality of functional cells. In some embodiments, a pre-designed filler cell is inserted within the at least one gap. By way of example, the pre-designed filler cell includes a layout design having a pattern associated with a particular failure mode. In various embodiments, a layer is patterned on a semiconductor substrate such that the pattern of the layout design is transferred to the layer on the semiconductor substrate. Thereafter, the patterned layer is inspected using an electron beam (e-beam) inspection process.
Public/Granted literature
- US20180006010A1 INTEGRATED CIRCUIT FILLER AND METHOD THEREOF Public/Granted day:2018-01-04
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