Invention Grant
- Patent Title: Reconfigurable and scalable hardware management architecture
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Application No.: US14576348Application Date: 2014-12-19
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Publication No.: US10296061B2Publication Date: 2019-05-21
- Inventor: Srirama Chandra , Robert Bartel
- Applicant: Lattice Semiconductor Corporation
- Applicant Address: US OR Hillsboro
- Assignee: Lattice Semiconductor Corporation
- Current Assignee: Lattice Semiconductor Corporation
- Current Assignee Address: US OR Hillsboro
- Agency: Haynes and Boone, LLP
- Main IPC: G06F1/20
- IPC: G06F1/20 ; G06F1/24 ; G06F1/28 ; G06F1/26

Abstract:
In one embodiment, a reconfigurable and scalable hardware management architecture includes a digital controller for controlling two or more analog sense-and-control (ASC) circuits, where each ASC monitors voltage, current, and temperature of one or more power supplies (e.g., DC-to-DC converters), ICs, or a circuit board. The controller and ASCs are connected in a star architecture, where each ASC is connected to the controller via a different, dedicated interface to communicate regarding the power supplies being monitored. In addition, the controller and the ASCs are also connected in a bus architecture via a shared interface. The architecture can be re-configured by adding one or more additional ASCs or by removing one or more existing ASCs, where each additional ASC is (i) connected to a different I/O interface of the digital controller via a different, dedicated interface and (ii) connected to the digital controller and the two or more existing ASCs via the shared interface.
Public/Granted literature
- US20160179071A1 Reconfigurable and Scalable Hardware Management Architecture Public/Granted day:2016-06-23
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