Systems and methods for processing non-contiguous submission and completion queues are disclosed. Non-Volatile Memory Express (NVMe) implements a paired submission queue and completion queue mechanism, with host software on a host device placing commands into the submission queue. The submission and completion queues may be contiguous or non-contiguous in host device memory. Non-contiguous queues may be defined by a link to a list on the host device that lists the non-contiguous sections in memory. In practice, the memory device stores the list in one type of memory (such as a dynamic random access memory (DRAM) cache) and the link in a different type of memory (such as always-on memory or non-volatile memory). In this way, the link may be accessed in various modes (such as low power mode) in order to recreate the list in DRAM. At least a part of the list of non-contiguous sections may be restored in response to the memory device exiting low power mode, or in response to determining that part or all of the list of noncontiguous sections is corrupted. The list of non-contiguous sections may comprise a list of physical region pages.