- Patent Title: Parameter collapsing and corner reduction in an integrated circuit
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Application No.: US15959398Application Date: 2018-04-23
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Publication No.: US10296704B2Publication Date: 2019-05-21
- Inventor: Eric Foreman , Jeffrey Hemmett
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Anthony R. Curro
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Reducing the runtime overhead needed for testing of an integrated circuit design. A determination may be made of parameters that clock routing and data routing in an integrated circuit are dependent upon. A determination is made of whether the parameters are suitable for compaction, such as by determining whether the parameters are utilized in only one of clock routing or data routing. The parameters suitable for compaction are defined or redefined into at least one proxy compacted parameter. A timing analysis for the integrated circuit is performed using the proxy compacted parameter instead of performing the timing analysis using the parameters suitable for compaction.
Public/Granted literature
- US20180357356A1 PARAMETER COLLAPSING AND CORNER REDUCTION IN AN INTEGRATED CIRCUIT Public/Granted day:2018-12-13
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