Invention Grant
- Patent Title: Sense amplifier and latch circuit for a semiconductor memory device and method of operation thereof
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Application No.: US15411225Application Date: 2017-01-20
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Publication No.: US10297326B2Publication Date: 2019-05-21
- Inventor: Yoshihiko Kamata , Yoko Deguchi , Takuyo Kodama , Tsukasa Kobayashi , Mario Sako , Kosuke Yanagidaira
- Applicant: TOSHIBA MEMORY CORPORATION
- Applicant Address: JP Tokyo
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Tokyo
- Agency: Kim & Stewart LLP
- Priority: JP2016-120976 20160617
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C16/26 ; G11C16/04 ; G11C16/32
Abstract:
A semiconductor memory device includes a memory cell, a bit line connected to the memory cell, and a sense amplifier connected to the memory cell through the bit line. The sense amplifier includes a sense node connected to the bit line, a first capacitive element connected to the sense node, and a static latch circuit connected to the sense node and retains data of the sense node.
Public/Granted literature
- US20170365348A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2017-12-21
Information query
