Invention Grant
- Patent Title: Wiring pattern manufacturing method and transistor manufacturing method
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Application No.: US15156958Application Date: 2016-05-17
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Publication No.: US10297773B2Publication Date: 2019-05-21
- Inventor: Shohei Koizumi , Takashi Sugizaki , Yusuke Kawakami
- Applicant: NIKON CORPORATION
- Applicant Address: JP Tokyo
- Assignee: NIKON CORPORATION
- Current Assignee: NIKON CORPORATION
- Current Assignee Address: JP Tokyo
- Priority: JP2013-240613 20131121
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/288 ; H01L21/28 ; H01L29/786 ; H01L51/00 ; H01L51/05 ; C23C18/31 ; C23C18/32 ; C23C28/00 ; C23C18/16 ; G03F7/20 ; G03F7/32 ; G03F7/40 ; C23C18/30 ; C23C18/34 ; C23C18/42
Abstract:
A wiring pattern manufacturing method includes: applying a liquid body including a first formation material on a substrate to form a base film; applying a liquid body including a second formation material on at least part of a surface of the base film to form a protection layer of the base film; forming a resist layer on a surface of the protection layer to expose the resist layer with desired patterning light; causing the exposed resist layer to come into contact with a developer to remove the resist layer and the protection layer until the base film is uncovered corresponding to the patterning light; and after depositing a catalyst on a surface of the uncovered base film, causing an electroless plating solution to come into contact with the surface of the base film to perform electroless plating.
Public/Granted literature
- US20160260916A1 WIRING PATTERN MANUFACTURING METHOD AND TRANSISTOR MANUFACTURING METHOD Public/Granted day:2016-09-08
Information query
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