Invention Grant
- Patent Title: Template-based epitaxial growth of lattice mismatched materials on silicon
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Application No.: US15660916Application Date: 2017-07-26
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Publication No.: US10310183B2Publication Date: 2019-06-04
- Inventor: Harry E. Ruda , Igor Savelyev , Marina Blumin , Christina F. Souza
- Applicant: Cisco Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Cisco Technology, Inc.
- Current Assignee: Cisco Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Patterson + Sheridan, LLP
- Main IPC: G02B6/12
- IPC: G02B6/12 ; G02B6/122 ; H01S5/30 ; H01S5/02

Abstract:
The embodiments of the present disclosure describe forming a semiconductor layer (e.g., III-V semiconductor material) on a silicon substrate using a template. In one embodiment, the template is patterned to form a plurality of cylindrical openings or pores that expose a portion of the underlying silicon substrate. The material of the semiconductor is disposed into the pores to form individual crystals or monocrystals. Because of the lattice mismatch between the crystalline silicon substrate and the material of the semiconductor layer, the monocrystals may include defects. However, the height of the pores is controlled such that these defects terminate at a sidewall of the template. Thus, the monocrystals can be used to form a single sheet (or single crystal) semiconductor layer above that template that is defect free.
Public/Granted literature
- US20190033524A1 TEMPLATE-BASED EPITAXIAL GROWTH OF LATTICE MISMATCHED MATERIALS ON SILICON Public/Granted day:2019-01-31
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