- Patent Title: Semiconductor integrated circuit and power supply switching method
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Application No.: US15635213Application Date: 2017-06-28
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Publication No.: US10310579B2Publication Date: 2019-06-04
- Inventor: Suguru Kawasoe
- Applicant: LAPIS Semiconductor Co., Ltd.
- Applicant Address: JP Yokohama
- Assignee: LAPIS Semiconductor Co., Ltd.
- Current Assignee: LAPIS Semiconductor Co., Ltd.
- Current Assignee Address: JP Yokohama
- Agency: JCIPRNET
- Priority: JP2016-127736 20160628
- Main IPC: G06F1/32
- IPC: G06F1/32 ; G06F1/26 ; G06F1/14 ; G06F1/28 ; G11C5/14

Abstract:
A semiconductor integrated circuit capable of efficiently suppressing power consumption when a power supply voltage is lowered is provided. The semiconductor integrated circuit includes: a regulator transforming an external power supply voltage to generate an internal power supply voltage; a processor circuit capable of operating by receiving the internal power supply voltage; a real time clock (RTC) circuit generating current time data by receiving the internal power supply voltage; a supply line supplying the internal power supply voltage to the RTC circuit and to the processor circuit; a changeover switch provided between the supply line and the processor circuit and switching between a connection state and a non-connection state between the supply line and the processor circuit; and a power supply level detection circuit detecting a voltage level of the external power supply voltage, and controlling the changeover switch so as to achieve the non-connection state between the supply line and the processor circuit if detecting that the voltage level is equal to or lower than a predetermined threshold.
Public/Granted literature
- US20170371389A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND POWER SUPPLY SWITCHING METHOD Public/Granted day:2017-12-28
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