Invention Grant
- Patent Title: Memory system and data relocating method
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Application No.: US15911015Application Date: 2018-03-02
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Publication No.: US10310766B2Publication Date: 2019-06-04
- Inventor: Shinichiro Nakazumi
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Tokyo
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Kim & Stewart LLP
- Priority: JP2017-058267 20170323
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
A memory system includes a nonvolatile semiconductor memory and a memory controller circuit. The memory controller circuit selects first and second blocks of the nonvolatile semiconductor memory, the first block being a garbage collection target block, the second block being a wear leveling target block or a refresh target block, relocates first data which is valid data stored in the first block in a series of write operations to a third block including first and second write operations, the third block being a block of the nonvolatile semiconductor memory having a free region, and relocates second data which is valid data stored in the second block in a series of write operations to a fourth block including a third write operation, the fourth block having a free region and being different from the third block, wherein the third write operation is performed between the first and second write operations.
Public/Granted literature
- US20180275911A1 MEMORY SYSTEM AND DATA RELOCATING METHOD Public/Granted day:2018-09-27
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