Facilitating recording a trace file of code execution using a processor cache. A computing device includes a plurality of processing units and a processor cache shared by the plurality of processing units. The processor cache includes a set of accounting bits that include different pluralities of accounting bits. Each plurality of accounting bits is associated with a different cache line of a plurality of cache lines of the processor cache, and includes a different unit bit associated with a different one of the plurality of processing units. The computing device also includes control logic that is configured to use the pluralities of accounting bits to indicate, for each cache line and for each processing unit, whether or not the processing unit has logged into a trace file a current value stored in the value portion of the cache line.