A phase changeable memory device may include a plurality of word lines, a plurality of bit lines, a memory cell, at least one source line, and a discharge unit. The bit lines may cross the word lines. The memory cell may include access elements connected with the at least one source line. The source line may be connected with the access elements. The discharge unit may be connected with a bit line. The discharge unit may be configured to discharge a voltage of the bit line to a ground terminal in response to a signal of the source line. The discharge unit may include a phase changeable material.