Invention Grant
- Patent Title: Dielectric gap fill evaluation for integrated circuits
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Application No.: US15847005Application Date: 2017-12-19
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Publication No.: US10312140B1Publication Date: 2019-06-04
- Inventor: Isabel Cristina Chu , Lawrence A. Clevenger , Leigh Anne H. Clevenger , Ekmini Anuja De Silva , Gauri Karve , Fee Li Lie , Nicole Adelle Saulnier , Indira Seshadri , Hosadurga Shobha
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Amin, Turocy & Watson, LLP
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L21/768 ; H01L23/522 ; H01L23/532

Abstract:
Apparatus and methods for dielectric gap fill evaluations are provided. In one example, a method can comprise providing a gap fill substrate over one or more interlayer dielectric trenches of a dielectric layer and over a first material located in the one or more interlayer dielectric trenches. The method can also comprise depositing a gap fill candidate material within one or more gap fill substrate trenches of the gap fill substrate. Furthermore, the method can comprise etching the gap fill candidate material until a void within the first material is identified. Additionally, the method can comprise filling the one or more gap fill substrate trenches with a second material to form one or more contacts with the first material to measure a leakage current of one or more pitches.
Public/Granted literature
- US20190189503A1 DIELECTRIC GAP FILL EVALUATION FOR INTEGRATED CIRCUITS Public/Granted day:2019-06-20
Information query
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