Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US15486741Application Date: 2017-04-13
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Publication No.: US10312252B2Publication Date: 2019-06-04
- Inventor: Yoshiyuki Kawashima
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2016-095047 20160511
- Main IPC: H01L29/08
- IPC: H01L29/08 ; H01L21/28 ; H01L27/11568 ; H01L21/265 ; H01L21/324 ; H01L27/11573 ; H01L29/423 ; H01L29/66 ; H01L29/792

Abstract:
A method of manufacturing a semiconductor device having a memory cell for a split-gate MONOS memory with a halo region, which prevents miswriting in the memory cell and worsening of short channel characteristics. In the method, a first diffusion layer of a drain region and a second diffusion layer of a source region in the memory cell for the MONOS memory are formed in different ion implantation steps. The steps are carried out so that the first diffusion layer has a smaller formation depth than the second diffusion layer. After the formation of the layers, the impurities inside the first and second diffusion layers are diffused by heat treatment to form a first diffusion region and a second diffusion region.
Public/Granted literature
- US20170330891A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2017-11-16
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