Invention Grant
- Patent Title: Programmable logic design
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Application No.: US15895321Application Date: 2018-02-13
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Publication No.: US10312918B2Publication Date: 2019-06-04
- Inventor: Hossein Asadi , Zahra Ebrahimi , Behnam Khaleghi
- Applicant: Hossein Asadi , Zahra Ebrahimi , Behnam Khaleghi
- Applicant Address: IR IR
- Assignee: HIGH PERFORMANCE DATA STORAGE AND PROCESSING CORPORATION,SHARIF UNIVERSITY OF TECHNOLOGY
- Current Assignee: HIGH PERFORMANCE DATA STORAGE AND PROCESSING CORPORATION,SHARIF UNIVERSITY OF TECHNOLOGY
- Current Assignee Address: IR IR
- Agency: NovoTechIP International PLLC
- Main IPC: H03K19/173
- IPC: H03K19/173 ; H03K19/177 ; H03K19/20 ; H03K19/00 ; G06F17/50
Abstract:
A programmable logic unit (PLU). The PLU includes a plurality of four-input reconfigurable hard logics (RHLs), a three-input look-up-table (LUT), and a plurality of reconfigurable inverters. The plurality of RHLs include a first RHL, a second RHL, and a third RHL. The plurality of reconfigurable inverters are associated with the plurality of RHLs.
Public/Granted literature
- US20180175862A1 PROGRAMMABLE LOGIC DESIGN Public/Granted day:2018-06-21
Information query
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