Invention Grant
- Patent Title: Multi-lane coherent transceiver with synchronized lane reset signals
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Application No.: US15997361Application Date: 2018-06-04
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Publication No.: US10313099B1Publication Date: 2019-06-04
- Inventor: Li Li , Hiva Hedayati
- Applicant: MACOM Technology Solutions Holding, Inc.
- Applicant Address: US MA Lowell
- Assignee: MACOM Technology Solutions Holding, Inc.
- Current Assignee: MACOM Technology Solutions Holding, Inc.
- Current Assignee Address: US MA Lowell
- Main IPC: H04L7/00
- IPC: H04L7/00 ; H04L7/033 ; H04B1/40

Abstract:
The reset signals output to the lanes of a multi-lane coherent transceiver are synchronized by first synchronizing an asynchronous reset signal to a low-speed clock signal to generate and output a plurality of synchronized reset signals to the lanes. Within each lane, a synchronous reset signal is delayed to generate a number of delayed synchronous reset signals, and the logic states of the synchronous reset signal and the delayed synchronous reset signals are captured. Based on the captured logic states in each of the lanes, a lane synchronized reset signal from the delayed synchronous reset signals is selected for use across all of the lanes.
Public/Granted literature
- US3222416A Extraction process Public/Granted day:1965-12-07
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