Invention Grant
- Patent Title: Semiconductor device with diffusion prevention layer
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Application No.: US15963305Application Date: 2018-04-26
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Publication No.: US10319828B2Publication Date: 2019-06-11
- Inventor: Tatsuo Shimizu , Hisashi Saito
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2015-179038 20150911
- Main IPC: H01L29/51
- IPC: H01L29/51 ; H01L29/16 ; H01L29/49 ; H01L29/778 ; H01L29/20 ; H01L29/78

Abstract:
A semiconductor device according to an embodiment includes a semiconductor region, a gate electrode, and a first gate insulating film provided between the semiconductor region and the gate electrode and containing a material having a chemical composition expressed by (SiO2)n(Si3N4)m (where n and m are positive integers), in the material, at least one silicon atom being bonded with at least one oxygen atom and at least one nitrogen atom.
Public/Granted literature
- US20180248016A1 SEMICONDUCTOR DEVICE Public/Granted day:2018-08-30
Information query
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