A display device includes a display array and a driving circuit. The display array includes at least one scan line. The driving circuit drives the display array and includes a timing controller and a gate driver. The timing controller controls a refresh rate of the display array at a first frequency or a second frequency, where the first frequency is higher substantially than the second frequency. The gate driver switches between supplying an enable voltage signal and a disable voltage signal to the scan line. Under the first or frequency, a corresponding first or second voltage difference exists between the enable voltage signal and the disable voltage signal. The first voltage difference is substantially greater than the second voltage difference, and the enable voltage signal has a same enable period.