Invention Grant
- Patent Title: Systems and methods for performing epitaxial smoothing processes on semiconductor structures
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Application No.: US15537734Application Date: 2015-12-18
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Publication No.: US10332781B2Publication Date: 2019-06-25
- Inventor: Charles Robert Lottes
- Applicant: Charles Robert Lottes , SunEdison Semiconductor Limited
- Applicant Address: TW Hsinchu
- Assignee: GlobalWafers Co., Ltd.
- Current Assignee: GlobalWafers Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Armstrong Teasdale LLP
- International Application: PCT/US2015/066617 WO 20151218
- International Announcement: WO2016/100792 WO 20160623
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/762 ; H01L21/66 ; H01L21/3065 ; H01L21/67
Abstract:
Systems and methods for processing semiconductor structures are provided. The methods generally include determining a desired removal map profile for a device layer of a semiconductor structure, determining a set of process parameters for use in an epitaxial smoothing process based on the desired removal map profile, and selectively removing material from the device layer by performing an epitaxial smoothing process on an outer surface of the device layer.
Public/Granted literature
- US20180277423A1 SYSTEMS AND METHODS FOR PERFORMING EPITAXIAL SMOOTHING PROCESSES ON SEMICONDUCTOR STRUCTURES Public/Granted day:2018-09-27
Information query
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