Invention Grant
- Patent Title: Dual-level power-on reset (POR) circuit
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Application No.: US15704789Application Date: 2017-09-14
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Publication No.: US10333511B2Publication Date: 2019-06-25
- Inventor: Alexander Wayne Hietala , Christopher Truong Ngo , Praveen Varma Nadimpalli
- Applicant: Qorvo US, Inc.
- Applicant Address: US NC Greensboro
- Assignee: Qorvo US, Inc.
- Current Assignee: Qorvo US, Inc.
- Current Assignee Address: US NC Greensboro
- Agency: Withrow & Terranova, P.L.L.C.
- Main IPC: H03K17/22
- IPC: H03K17/22 ; G05F3/08 ; H01L23/525

Abstract:
An integrated circuit (IC) including a first power-on reset (POR) circuit and a second POR circuit is disclosed. The first POR circuit is configured to enable the second POR circuit when a supply voltage initially exceeds a first threshold voltage as the supply voltage is being applied to the IC. The second POR circuit is configured to activate a first section of circuitry when the second POR circuit is enabled by the first POR circuit and the supply voltage initially exceeds a second threshold voltage as the supply voltage is being applied to the IC. Since a POR threshold voltage can affect current drain and/or operational functions of an IC, having the first POR circuit configured to enable the second POR circuit and having the second POR circuit configured to activate the first section of the main circuitry allows the IC to operate properly while reducing current drain.
Public/Granted literature
- US20180076810A1 DUAL-LEVEL POWER-ON RESET (POR) CIRCUIT Public/Granted day:2018-03-15
Information query
IPC分类: