Invention Grant
- Patent Title: Deterioration detection device for printed circuit board
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Application No.: US15477650Application Date: 2017-04-03
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Publication No.: US10338129B2Publication Date: 2019-07-02
- Inventor: Yukio Shibata
- Applicant: FANUC CORPORATION
- Applicant Address: JP Yamanashi
- Assignee: FANUC CORPORATION
- Current Assignee: FANUC CORPORATION
- Current Assignee Address: JP Yamanashi
- Agency: Hauptman Ham, LLP
- Priority: JP2016-075350 20160404
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
A deterioration detection device for a printed circuit board includes a monitoring conductor and a voltage supply conductor for supplying voltage/current arranged on the printed circuit board with an arbitrary clearance. A voltage Vx is applied to the voltage supply conductor at a plurality of points. A voltage (0 V) lower than the voltage Vx for the voltage supply conductor is applied to the monitoring conductor through a resistor. An amplifier circuit amplifies a voltage Vy for the monitoring conductor and outputs an output voltage Vout. If the printed circuit board is deteriorated and an insulation resistance Ry between the monitoring conductor and the voltage supply conductor is reduced, the output voltage Vout increases, so that deterioration of the printed circuit board can be detected.
Public/Granted literature
- US20180128870A9 DETERIORATION DETECTION DEVICE FOR PRINTED CIRCUIT BOARD Public/Granted day:2018-05-10
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