- Patent Title: Method of generating engineering change order (ECO) layout of base cell and computer-readable medium comprising executable instructions for carrying out said method
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Application No.: US15474460Application Date: 2017-03-30
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Publication No.: US10339250B2Publication Date: 2019-07-02
- Inventor: Li-Chun Tien , Ting-Wei Chiang , Shun Li Chen , Ting Yu Chen , XinYong Wang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50 ; H01L21/768 ; H01L23/522 ; H01L23/528 ; H01L27/02 ; H01L27/118

Abstract:
A method of generating an ECO-layout of an ECO base cell includes: generating first and second active area patterns and arranging them on opposite sides of a first axis; generating non-overlapping first, second and third conductive patterns and arranging each of them so as to correspondingly overlap the first and second active area patterns; locating the first conductive pattern between the second and third conductive patterns; generating a first cut-pattern which overlaps corresponding central regions of the second, and third conductive patterns; aligning the first cut-pattern relative to the first axis; generating a fourth conductive pattern; locating the fourth conductive pattern over an area bounded by the first cut-pattern; and expanding the fourth conductive pattern to occupy an area which substantially overlaps a first segment of the first conductive pattern and a first segment of one of the second and third conductive patterns, thereby resulting in the ECO-layout.
Public/Granted literature
- US20180150586A1 STANDARD CELL LAYOUT, SEMICONDUCTOR DEVICE HAVING ENGINEERING CHANGE ORDER (ECO) CELLS AND METHOD Public/Granted day:2018-05-31
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