Invention Grant
- Patent Title: LDMOS FinFET device
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Application No.: US15473183Application Date: 2017-03-29
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Publication No.: US10340274B2Publication Date: 2019-07-02
- Inventor: Fei Zhou , Zhongshan Hong
- Applicant: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION , SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
- Applicant Address: CN Beijing CN Shanghai
- Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION,SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
- Current Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION,SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
- Current Assignee Address: CN Beijing CN Shanghai
- Agency: Kilpatrick Townsend & Stockton LLP
- Priority: CN201610424198 20160615
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L27/092 ; H01L29/49 ; H01L29/78 ; H01L29/06 ; H01L29/08 ; H01L29/10 ; H01L21/3105 ; H01L21/321 ; H01L21/8238 ; H01L27/02 ; H01L21/28
Abstract:
A method of manufacturing a semiconductor device is provided. The semiconductor device includes a semiconductor substrate, first and second fins on the semiconductor substrate and separated by a trench. The first fin includes a first portion having a first conductivity type and a second portion having a second conductivity type different from the first conductivity type, the first and second portions are adjacent to each other, and the second portion connected to the second fin through the semiconductor substrate. The semiconductor device also includes a gate structure on the first and second portions and including a gate insulator layer on the first and second portions, a gate on a portion of the gate insulator layer on the first portion, and a dummy gate on the second portion and including an insulating layer or an undoped semiconductor layer and adjacent to the gate.
Public/Granted literature
- US20170365603A1 LDMOS FINFET DEVICE Public/Granted day:2017-12-21
Information query
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