The present disclosure relates to a mask plate and a manufacturing method of array substrates. The mask plate includes: at least two first sub-areas and at least one second sub-area. Wherein the first sub-areas are spaced apart from each other, and the first sub-areas are configured to be as semi-transparent areas, and a transmittance rate of the the second sub-area is greater than the first sub-area. When conducting an exposure process on a photoresist, a thickness of the exposed photoresist via the second sub-area is greater than a thickness of the exposed photoresist via the first sub-area. When manufacturing an array substrate, a channel of the array substrate corresponds to the second sub-area. The time for conducting the exposure process and an ashing process may be reduced by adopting the mask plate when manufacturing the array substrates.