A memory access control device includes: an in-process number calculating unit that calculates an in-process number, which is a number of in-process load requests, at a predetermined time to a memory network; a reply number calculating unit that calculates a number of replies of the load requests received in a predetermined period from the predetermined time; an issuance number limitation unit that calculates an issuance limit value of the load requests in the predetermined period; an update determination unit that decides the issuance limit value regarding a next period on a base of the in-process number, the number of replies, and the issuance limit value in the predetermined period; and a hold determination unit that outputs a hold instruction of the load requests to a request pipeline connected to the memory network when the in-process number is larger than the issuance limit value regarding the next period.