Invention Grant
- Patent Title: Analog neuromorphic circuits for dot-product operation implementing resistive memories
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Application No.: US16242146Application Date: 2019-01-08
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Publication No.: US10346738B2Publication Date: 2019-07-09
- Inventor: Chris Yakopcic , Tarek M. Taha , Md Raqibul Hasan
- Applicant: University of Dayton
- Applicant Address: US OH Dayton
- Assignee: University of Dayton
- Current Assignee: University of Dayton
- Current Assignee Address: US OH Dayton
- Agency: Taft Stettinius & Hollister LLP
- Main IPC: G06N3/063
- IPC: G06N3/063 ; G11C11/54 ; G06F17/10 ; G11C13/00

Abstract:
An analog neuromorphic circuit is disclosed having resistive memories that provide a resistance to each corresponding input voltage signal. Input voltages are applied to the analog neuromorphic circuit. Each input voltage represents a vector value that is a non-binary value included in a vector that is incorporated into a dot-product operation with weighted matrix values included in a weighted matrix. A controller pairs each resistive memory with another resistive memory. The controller converts each pair of resistance values to a single non-binary value. Each single non-binary value is mapped to a weighted matrix value included in the weighted matrix that is incorporated into the dot-product operation with the vector values included in the vector. The controller generates dot-product operation values from the dot-product operation with the vector and the weighted matrix where each dot-product operation is a non-binary value.
Public/Granted literature
- US20190138894A1 ANALOG NEUROMORPHIC CIRCUITS FOR DOT-PRODUCT OPERATION IMPLEMENTING RESISTIVE MEMORIES Public/Granted day:2019-05-09
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