Invention Grant
- Patent Title: Link training mechanism by controlling delay in data path
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Application No.: US15845683Application Date: 2017-12-18
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Publication No.: US10347347B1Publication Date: 2019-07-09
- Inventor: Amit Kumar Srivastava , Sriram Balasubrahmanyam
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Green, Howard & Mughal, LLP
- Main IPC: G11C16/32
- IPC: G11C16/32 ; G11C7/22

Abstract:
An apparatus is provided which comprises: a buffer to receive first data from a host, and output the first data with configurable delay; and one or more circuitries to: compare the first data from the host with second data that is accessible to the apparatus, wherein the second data is substantially a copy of the first data, and calibrate the delay of the buffer, based at least in part on the comparison of the first data and the second data.
Public/Granted literature
- US20190189226A1 LINK TRAINING MECHANISM BY CONTROLLING DELAY IN DATA PATH Public/Granted day:2019-06-20
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