Invention Grant
- Patent Title: Transistor and fabrication method thereof
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Application No.: US15435557Application Date: 2017-02-17
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Publication No.: US10347493B2Publication Date: 2019-07-09
- Inventor: Yong Li
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation , Semiconductor Manufacturing International (Beijing) Corporation
- Applicant Address: CN Shanghai CN Beijing
- Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION,SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
- Current Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION,SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
- Current Assignee Address: CN Shanghai CN Beijing
- Agency: Anova Law Group, PLLC
- Priority: CN201610231449 20160414
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L29/66 ; H01L21/8238 ; H01L29/423 ; H01L29/78 ; H01L27/092 ; H01L21/02 ; H01L21/768 ; H01L29/49
Abstract:
A transistor and a method of forming the transistor are provided. The method includes forming a first interlayer dielectric layer on a substrate, forming an opening through the first interlayer dielectric layer, and forming a work function layer over side surfaces and a bottom of the opening. The method further includes forming a gate electrode layer over the work function layer, removing at least a portion of the work function layer over side surfaces of the gate electrode layer to form grooves, and forming a protection layer in the grooves.
Public/Granted literature
- US20170301545A1 TRANSISTOR AND FABRICATION METHOD THEREOF Public/Granted day:2017-10-19
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