Invention Grant
- Patent Title: Multi-chip package of power semiconductor
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Application No.: US15859988Application Date: 2018-01-02
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Publication No.: US10347565B2Publication Date: 2019-07-09
- Inventor: Si Hyeon Go , Jae Sik Choi , Myung Ho Park , Dong Seong Oh , Beom Su Kim
- Applicant: MagnaChip Semiconductor, Ltd.
- Applicant Address: KR Cheongju-si
- Assignee: MagnaChip Semiconductor, Ltd.
- Current Assignee: MagnaChip Semiconductor, Ltd.
- Current Assignee Address: KR Cheongju-si
- Agency: NSIP Law
- Priority: KR10-2017-0073293 20170612
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L25/07 ; H01L25/18 ; H01L29/417 ; H01L29/423

Abstract:
A multi-chip package of power semiconductor includes a lead frame, a first segment group, a second segment group, a first power semiconductor chip and a second power semiconductor chip. The lead frame includes a first segment group having a first gate segment, a first source segment, and a first drain segment that are separated from each other. The second segment group has a second gate segment, a second source segment, and a second drain segment that are separated from each other. The first power semiconductor chip is formed on the first segment group. The second power semiconductor chip is formed on the second segment group. The first source segment is physically connected to the second drain segment.
Public/Granted literature
- US20180358285A1 MULTI-CHIP PACKAGE OF POWER SEMICONDUCTOR Public/Granted day:2018-12-13
Information query
IPC分类: