Invention Grant
- Patent Title: Semiconductor structure and fabrication method thereof
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Application No.: US15673628Application Date: 2017-08-10
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Publication No.: US10347578B2Publication Date: 2019-07-09
- Inventor: Cheng Long Zhang , Qi Yang He , Yan Wang
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation , Semiconductor Manufacturing International (Beijing) Corporation
- Applicant Address: CN Shanghai CN Beijing
- Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION,SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
- Current Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION,SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
- Current Assignee Address: CN Shanghai CN Beijing
- Agency: Anova Law Group, PLLC
- Priority: CN201610664696 20160812
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/528 ; H01L21/027 ; H01L21/311 ; H01L21/768 ; H01L23/522
Abstract:
A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes providing a base substrate including a device region and a peripheral region. The base substrate includes a base interconnection structure. The method also includes forming a medium layer on the base substrate. In addition, the method includes forming a first trench having a first depth in the peripheral region, and forming a second trench having a second depth in the device region. The second depth is greater than the first depth. Moreover, the method includes forming a first opening in the device region and forming a second opening in the peripheral region. Further, the method includes forming a first interconnection structure by filling the first opening with a conductive material and forming a second interconnection structure by filling the second opening with the conductive material.
Public/Granted literature
- US20180047665A1 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF Public/Granted day:2018-02-15
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