Invention Grant
- Patent Title: Non-volatile memory with stacked semiconductor chips
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Application No.: US15819704Application Date: 2017-11-21
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Publication No.: US10347618B2Publication Date: 2019-07-09
- Inventor: Masanori Onodera , Kouichi Meguro , Junji Tanaka
- Applicant: VALLEY DEVICE MANAGEMENT
- Applicant Address: US DE Wilmington
- Assignee: VALLEY DEVICE MANAGEMENT
- Current Assignee: VALLEY DEVICE MANAGEMENT
- Current Assignee Address: US DE Wilmington
- Agency: Van Court & Aldridge LLP
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L25/00 ; H01L21/56 ; H01L21/683 ; H01L23/31 ; G06F1/18 ; H01L23/00 ; H01L23/66 ; H01L25/18

Abstract:
Various embodiments of the present disclosure include a non-volatile memory semiconductor device and a device that uses the same, the semiconductor device including a first semiconductor chip disposed on a substrate, a first sealing resin sealing the first semiconductor chip, a built-in semiconductor device disposed on the first sealing resin, and a second sealing resin sealing the first sealing resin and the built-in semiconductor device and covering a side surface of the substrate. According to an aspect of the present disclosure, it is possible to provide a high-quality semiconductor device, in which downsizing and cost reduction can be realized.
Public/Granted literature
- US20180076188A1 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREFORE Public/Granted day:2018-03-15
Information query
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