Invention Grant
- Patent Title: Method and structure for straining carrier channel in vertical gate all-around device
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Application No.: US15423661Application Date: 2017-02-03
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Publication No.: US10347746B2Publication Date: 2019-07-09
- Inventor: Tetsu Ohtou , Jiun-Peng Wu , Ching-Wei Tsai
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: Jones Day
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L29/06 ; H01L29/10 ; H01L29/40 ; H01L29/41 ; H01L29/423 ; H01L29/775

Abstract:
Method and structure for enhancing channel performance in a vertical gate all-around device, which provides a device comprising: a source region; a drain region aligned substantially vertically to the source region; a channel structure bridging between the source region and the drain region and defining a substantially vertical channel direction; and a gate structure arranged vertically between the source region and the drain region and surrounding the channel structure. The channel structure comprises a plurality of channels extending substantially vertically abreast each other, each bridging the source region and the drain region, and at least one stressor interposed between each pair of adjacent channels and extending substantially along the vertical channel direction; the stressor affects lateral strain on the adjacent channels, thereby straining the channels in the vertical channel direction.
Public/Granted literature
- US20170148899A1 Method and Structure for Straining Carrier Channel in Vertical Gate All-Around Device Public/Granted day:2017-05-25
Information query
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