Invention Grant
- Patent Title: Split gate non-volatile memory (NVM) with improved programming efficiency
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Application No.: US15807539Application Date: 2017-11-08
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Publication No.: US10347773B2Publication Date: 2019-07-09
- Inventor: Wei Si , Zeng Wang , Jeoung Mo Koo , Raj Verma Purakh
- Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Current Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Current Assignee Address: SG Singapore
- Agency: Thompson Hine LLP
- Main IPC: G11C16/04
- IPC: G11C16/04 ; H01L29/788 ; H01L29/66 ; H01L27/11517 ; H01L21/28 ; H01L29/423 ; G11C16/34

Abstract:
Device and method of forming a non-volatile memory (NVM) device are disclosed. The NVM device includes NVM cells disposed on a substrate in a device region. The NVM cell includes a floating gate (FG) with first and second FG sidewalls disposed on the substrate and an intergate dielectric layer disposed over the FG and substrate. Re-entrants are disposed at corners of the intergate dielectric which are filled by dielectric re-entrant spacers. An access gate (AG) with first and second AG sidewalls is disposed on the substrate adjacent to the FG such that the second AG sidewall is adjacent to a first FG sidewall and separated by the intergate dielectric layer and the re-entrant spacers prevent AG from filling the re-entrants. A first source/drain (S/D) region is disposed in the substrate adjacent to the first AG sidewall and a second S/D region is disposed in the substrate adjacent to the second FG sidewall.
Public/Granted literature
- US20190140099A1 SPLIT GATE NON-VOLATILE MEMORY (NVM) WITH IMPROVED PROGRAMMING EFFICIENCY Public/Granted day:2019-05-09
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